Frédéric Nodet
Sophia-Antipolis - France
| English | French |
Schools attended |
Since 2006: Elsys Design |
Top-level Verification Engineer
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Verification Engineer - Modem+Application chip Texas Instruments France, Nice - Top-level Verification . Developing testcases to verify integration and functionalities of modules - ARM9 / DSP driven - HDQ/1-Wire, GPIO, Keyboard controller - Security modules - Display Sub-system - DMA, Security and PowerManagement mechanisms, DSP boot - 3G Sub-System Verification . 6 weeks in San Diego to implement customer 3G usecases implying several coupled customer and TI IPs . Porting usecases at top-level - adding power aspects . Developing C library for customer IP . Customer usecases signoff - Gate-level simulation - RTL and GLS regression owner . Debugging reference testcases before environment release . First level of debug and follow-up . ECO validation - Supporting San Diego team in charge of ES2.0 top-level verification Technical Environment - ModelSim - ClearCase/ClearQuest - VNC - Audio Conferencing and NetMeeting | |
Sector: Engineering - Projects |
2006 : STMicroelectronics |
Internship
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Wireless Infrastructure Division - Study of Channel Estimation algorithm for Mobile WiMax Developpment of a Matlab Model of WiMax Physical layer Research and Algorithmic Validation under Matlab Test vectors Generation - DSP Implementation of the Channel Estimation algorithm Writing the algorithm in C Fixed-point Code Profiling and C-level optimization - Verification of a 802.16e Modem Writing drivers and low-level tests in C Simulation with ModelSim under ClearCase | |
Sector: Electronics and microelectronics |
2005 : CNRS |
Intership
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Hardware Scheduler for Real Time Operating System - Specification writing of an hardware scheduler IP Interface with the proprietary RTOS Implemented scheduling politics Material re-use - VHDL development and Verification using Mentor Graphics tools - FPGA Synthesis and Performance Tests on Xilinx Virtex II pro including 2 PowerPC processors up to 20% CPU time saved lower latencies for critical tasks | |
Sector: Electronics and microelectronics |
