Adrien ILLE
ESD and Latch up development engineer, Infineon Technologies AG
Munich - Germany
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A former student at |
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Université Aix Marseille I (DEA, systèmes complexes et phénomènes hors d'équilibre)
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Since 2007: Infineon Technologies AG |
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ESD and Latch up development engineer
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Sector: Electronics and microelectronics
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Since 2004: Infineon Technologies AG |
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PhD Student
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Thin gate oxides reliability of deep sub-micron CMOS technologies under ESD stress.
Publications and Communications: Ille A., Stadler W., Pompl T., Gossner H., Brodbeck T., Esmark K., Riess P., Alvarez D., Chatty K., Gauthier R., and Bravaix A. Reliability aspects of gate oxide under ESD pulse stress. In IEEE EOS/ESD Symposium Proceedings, pages 328–337, 2007. Ille A., Stadler W., Gossner H., Brodbeck T., Pompl T., and Bravaix A. Thin gate oxides time-to-breakdown in the ESD time domain and consequences for applications. In International Electrostatic Discharge Workshop, pages 176–186, 2007. Ille A., Stadler W., Kerber A., Pompl T., Brodbeck T., Esmark K., and Bravaix A. Ultra-thin gate oxide reliability in the ESD time domain. In 17th annual Reliability Center for Electronic Components of Japan Symposium, number ISSN 1349-6379, pages 75–84, 2007. Ille A., Stadler W., Kerber A., Pompl T., Brodbeck T., Esmark K., and Bravaix A. Ultra-thin gate oxide reliability in the ESD time domain. In IEEE EOS/ESD Symposium Proceedings, pages 285–294, 2006. [Best Paper Award] |
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Sector: Electronics and microelectronics
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2004 - ... : Infineon Technologies AG |
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Engineer traineeship
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ESD protection structures characterization in advance CMOS process (0.13 µm, 90 nm) on wafers, chips and products levels. A special focus on a high-performance RF-CMOS I/O circuits.
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Sector: Electronics and microelectronics
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2003 - ... : SOLLAC Méditerranée |
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Technical traineeship
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Feasibility studies for the monitoring and establishment of remote control systems from dedicated sensors used in the lamination process of steel.
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Sector: Metallurgy
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